Intel lifts curtain on Nehalem performance (hint: it's fast)!
Intel's Nehalem (Core i7, if you prefer the official brand name) has been one of the most-anticipated computer products of 2008 and, as of this morning... it's still one of the most anticipated products of 2008. Intel isn't launching the Core i7 yet—that will come later this month—but the company is allowing online and print publications to give a prelaunch look at the chip's performance. Those of you with significant others might actually find this is something of a boon, as it gives you plenty of time to come up with a reason why
she should want a faster computer this Christmas.
Nehalem is officially the "tock" of Intel's processor cycle and the company's second and last 45nm architecture refresh before it launches Westmere and Sandy Bridge, both of which will be built on a 32nm process. What we have in the image below is an excellent representation of Intel's manufacturing and design cycle, but a poor representation of what Nehalem is and what it means for Intel. Strictly speaking, Nehalem's core architecture is a direct descent of (and an improvement upon) Penryn—a "tock" in other words. Evaluated as a platform, though, Nehalem is much more than a Penryn-follow-up. Starting now, (technically, in a few weeks), Intel is changing the way its microprocessors do business, and the company's shift has significant implications for the entire computing industry.
It's the interconnects, stupid.
Part of the reason the PC community has anticipated Nehalem so hotly lies within three magic words: integrated memory controller. AMD didn't invent the concept of an on-die memory controller but, until Sunnyvale launched Opteron/Athlon 64 back in 2003, the PC enthusiast community wasn't generally familiar with the performance benefits that this a solution could deliver. When K8 debuted, sporting both a fancy new interconnect (HyperTransport) and a new memory controller, bolted directly to the processor and running at full processor speed, the results were extraordinary; the company moved from also-ran to serious competitor in a single stroke.
Up until now, Intel has avoided this move, choosing instead to rely upon the GTL+ bus specification that it first debuted in the days of the Pentium Pro. Intel's decision to continue using the comparatively ancient GTL+ bus over the past five years gave AMD an edge in certain performance scenarios, and reduced Opteron's need for a large, expensive L2 (or L2/L3) cache. AMD's superior interconnect technology has remained an important bullet point on the company's list of reasons why potential customers should choose Opteron but, as of today, that particular playing field is level. Starting with Nehalem, Intel is debuting both a triple-channel integrated memory controller (take THAT, AMD), and a point-to-point protocol of its own, dubbed QuickPath Interconnect (QPI). The entire launch platform, complete with gratuitous numerical pornography is shown below.
The X58 Express is a two-chip northbridge/southbridge solution, but only the X58 IOH (I/O Hub) is actually a new part. That's an approach that makes good sense for Intel, and the ICH10/ICH10R solution that partners with the X58 IOH is as full-featured a chip as one could ask for. The X58 IOH supports up to 36 PCIe 2.0 lanes (or up to 4x8 configurations), and interfaces with the Core i7 processor via a 25.6GB/s QPI connection. AMD's HyperTransport 3.0 still has an advantage here—the HT 3.0 standard provides up to 41.6GB/s of bi-directional bandwidth—but Intel's QPI offers up to twice the 12.8GB/s of bandwidth of the X48 chipset, and supports full-duplex transport instead of the half-duplex limitation of the GTL+ bus. If there's a downside to the X58 Express, it lies solely in the chipset's lack of support for any sort of legacy peripherals—no PS/2, no IDE, no serial ports, no parallel ports, zip, zadda, zilch. Motherboard manufacturers may opt to provide some of these features via third-party solutions.
Read more at the source.
Later

Ted