Yes beret I sort of get it from looking at this
Front-side bus - Wikipedia, the free encyclopedia the bus you are speaking of is the total of the caches being channeled to the chipset and then to the RAM.
But if the FSB is set at 100MHz unless clocked higher somehow then the transfer rate to the RAM from the chipset will also have to be held at the same rate? Now taking that I want to use 1866MHz RAM how am I going to achieve that speed from the chipset to the CPU? if the transfer rate (1866MHz) is achievable (as it is confirmed by the Asus site specs) from RAM to chipset?
That is a lot of speed difference my friend