GNU gcc make problem

[chrstdvd]

I am learning to program in C. I have Code Blocks installed and working great and have used it to write code to learn.

I want to write code in Notepad ++ and compile it in Power Shell which is set up. I have GNU gcc in C:\Gnu gcc and Code Blocks finds an uses it, [I added it to the environment path] as well as, Power Shell; if i type in gcc ex1.c -o ex1.exe, the .exe there works with ./ex1 or if i type in invoke-item ex1.exe, then the command window comes up with the output listed. I use the getchar() to make it stay on screen so I can see the result.

I am working through the tutorial Learn C the Hard Way Learn C The Hard Way
The author wants us to use MAKE. I can not make MAKE work.

I have Googled and Googled and Googled for how to make it work. My Make exe is in GNU gcc\mysys\1.0.

I read that I should cope make.exe into GNU gcc\bin which I did and at least I get error messages like "file not found". If it is not there, I get Make is not a commandlet ... error in Power Shell.

I can not find MAKEFILE anywhere.

I have bookmarked several how to's to make my own MAKEFILE but to heck with that if I have to create or change it for each .c file i want to compile.

Is there a generic MAKEFILE that will compile all simple lesson .c files?

Thanks
David

 

[oneeyed]

Easy way would be to add C:\Gnu gcc\bin\ (or wherever you want to put make) to your environment path.

Methinks you can specify from which directory/location make operates... Here is a page which might interest you : Environment Variables - Using the GNU Compiler Collection (GCC)

 

[chrstdvd]

Thanks, I added the path to the "make.exe" file to the environmental path.

Now when I try to run make I get this:
PS C:\Users\David\Cprojects> make ex1
cc ex1.c -o ex1
make.exe": cc: Command not found
make.exe": *** [ex1] Error 127

I tried several example Makefile's in the working directory but all I get from them are NO Rules.

I am wondering about the tab rule for constructing a Makefile file

I put a tab at the beginning of every line and in every white space.

Is that the correct way to do it?

 

[chrstdvd]

OK, last night I found a basic Makefile and it would not work either but the error messages clued me into line numbers were failing, so I commented them out and re-typed them using the Tab rule for every white space. The final error was that it could not find CC, so I added a line," "CC = gcc" Tab'ed properly and tried again.

Success! It works for all my little projects while I learn to program in C and I do not have to modify anything in it as I go. I am sure it is only for one file at a time other than the header files in the .c itself.

Here it is, if anyone else ever has the problem. But if you use it make sure to use the tab for white spaces rather than the space bar.

HEADERS = program.h headers.h
OBJECTS = program.o
CC = gcc
CFLAGS = -g -Wall
default: program

%.o: %.c $(HEADERS)
#gcc -c $< -o $@
gcc -c $< -o $a@

program: $(OBJECTS)
#gcc $(OBJECTS) -o $@
gcc $(OBJECTS) -O $@

clean:
#-rm -f $(OBJECTS)
-rm -F $(OBJECTS)

#-rm -f program
-rm -f program